I notice no one's actually properly tested the impact of memory in Stellaris, and In the wake of what we can expect to be increases in memory latency across the board with Intel cutting costs by adopting a chiplet i/o next generation, putting them more in line with AMD in that department, I decided to do what I could with my 10th gen cpu to figure out how much memory latency and perhaps bandwidth factors in to Stellaris performance, and maybe get some idea of how much degradation we can expect on future Intel CPU's, if any. Of course, my cpu is a monoblock with an integrated memory controller, so the only way I can enforce memory latency comparable to Ryzen or the upcoming intel 11th Gen is by completely destroying my memory timings.
I went ahead and started up a 1000 star game with 5x habitable worlds, low tech costs, max empires, all advanced starts, and let fast_forward run for awhile. When i got tired of waiting, we ended up almost 200 years into the game. No end game crisis yet, but there was millions of fleet power on the board and total galaxy population was pushing to just over 50k pops, which is of course insane. Safe to say that despite this only being like 184 years into the game, this represents a very intense late game scenario that most people probably won't reach in their average game unless they make a habit of using those stupid galaxy settings I punched in.
I then did 9 test runs, spread across 3 different RAM configurations, stopwatching how long it takes a single year to pass under very controlled conditions, everything kept the same from background programs to where my camera is and how zoomed it is on the galaxy map in oberver. GPU usage was minimal, cpu clock speed was consistently 4.15ghz on avg across all tests. Below are the details on my system, ram configurations, and the results:
intel core i3-10100
nvidia geforce gtx 960 4gb
16gb ddr4 dual channel 8gbx2 samsung b-die
Daily Config: 4400 18-18-18-42 420tRFC CR2
Memory latency 41.9ns
Read 57000 MB/s
Write 64000 MB/s
Copy 51000 MB/s
Tight 2933 Config: 2933 11-11-11-28 234tRFC CR2
Memory latency 42.1ns
Read 44000 MB/s
Write 44000 MB/s
Copy 39000 MB/s
Craptastic 2933 Config: 2933 28-28-28-64 770tRFC CR2
Memory latency ~63.4 NS (roughly equivalent to Zen+ or Matisse)
Read 38000 MB/s
Write 42000 MB/s
Copy 32000 MB/s
Test results one year on Fastest, starting on resume game with spacebar and ending on Day 2 of the following year (to account for missing most of the start of year lag for the initial year since I saved the game after it):
Daily Config - high bandwidth/low latency
test #1 - 5 minutes 34 seconds
test #2 - 5 minutes 35 seconds
test #3 - 5 minutes 35 seconds
Tight 2933 Config - low bandwidth/low latency
test #1 5 minutes 35 seconds
test #2 5 minutes 39 seconds
test #3 5 minutes 36 seconds
Craptastic 2933 config - low bandwidth/high latency
test #1 6 minutes 14 seconds
test #2 6 minutes 15 seconds
test #3 6 minutes 12 seconds
Conclusion: Stellaris is sensitive to memory latency, and introducing a large amount of it through timings that are much looser than you'd ever actually run introduces substantial performance degradation. Memory bandwidth matters much less, if at all, past a certain point, as there was no significant performance difference between my daily 4400 and tight 2933 configurations in spite of a large difference in read/write speeds; DDR5 is not likely to offer any gains in Stellaris, and 10th gen Intel MIGHT be better than 11th gen Intel, although that is a big assumption that will have to wait until I actually have an 11th gen chip in my system to test.
However, this ultimately may not be a good indicator of Ryzen performance difference vs Skylake. AMD has designed Zen with higher memory latency in mind, and it copes with this with this limitation with features like a larger cache subsystem, a wider reorder buffer, and a massively larger uOP cache than Skylake's, among other things. Worse memory latency still hurts, but I suspect it hurts a lot less for AMD than it does for Intel (which makes Intel's upcoming 11th gen's inclusion of a chiplet i/o but favoring Sunny Cove's relatively anemic l2/l3 cache configuration compared to Zen 3 puzzling, when they should have gone with Willow Cove's. They either managed not to incur a large latency penalty with their desktop EMIB/Foveros chiplet implementation, or they simply don't care of AMD destroys them in games with Zen 3.)
Anyway, if anyone wants to run their own tests on this save, I have included it in the attached file. It is vanilla, only utopia and horizon signal are needed to run the save, but i conducted my tests with all DLC active... I would be interested to see some results with something like a Ryzen 3 3300x.